Output buffers are generally used for interfacing electronic circuits (such as semiconductor memory devices) with the external environment, typically a system bus. The output buffers amplify the signals to be provided to the bus; moreover, they supply the power (i.e., the current) required to drive a capacitive load that is generally introduced by the bus.
In certain applications, the output buffers must be able to drive a variable capacitive load. The unexpected variability of the capacitive load may impair the performance of the electronic circuit as a whole.
For example, when the output buffers are adapted to deliver data from a memory device to a bus, the output rate of the data depends on the slew rate of each output buffer. As it is well known, the slew rate is the changing rate of the voltage furnished by the output buffer over time; this parameter depends on the value of the capacitive load and on the value of the current supplied by the output buffer. Thus, when the value of the current is fixed, the actual slew rate is affected by the variable capacitive load and accordingly its value will be different from the desired one; in particular, for high capacitive loads the slew rate will be lower (thereby reducing the output rate). Conversely, for low capacitive loads the slew rate will be higher. However, an output buffer having a slew rate greater than the desired one is often unfavorable since it can generate a large number of high-frequency harmonics. The high-frequency harmonics can give rise to electromagnetic interference that impairs the performance of the electronic circuit as a whole.
Moreover, in order to have an error-free data transfer it is often necessary to reduce the noise sources, such as the switching noise and the IR noise. Both these noise sources are directly dependent on the current supplied to the capacitive load and on the parasitic elements, for example, due to forward and backward cross-talk phenomena.
In order to accommodate variable capacitive loads, a solution could be to supply a fixed current assuming a large capacitive load (so as to ensure the desired output rate in any condition); however, for the above described reasons, this choice increases the contribution of the noise sources to the error in the data transfer when the actual capacitive load is lower. Moreover, this solution is sensitive to the typically unavoidable process spreads.
A known solution to the problem is of providing an output buffer that can be customized for the actual capacitive load through a suitable programming by the users. Even though this solution allows adjusting the slew rate depending on the capacitive load, it has a series of drawbacks. First of all, the proposed solution is not able to adjust the slew rate automatically; moreover, it also assumes the capacitive load is known. In any case, the programming requires a direct intervention of the users (which can be undesirable if not even unacceptable).
The U.S. Pat. No. 6,130,541, which is incorporated by reference, proposes an output buffer with a circuit for sensing the capacitive load and for adjusting the output current accordingly, so as to reach the desired slew rate. In this patent, the sensing of the capacitive load is based on providing a predefined reference current to the capacitive load and then measuring the corresponding voltage slope. A drawback of this solution is that a leakage current of the capacitive load may impair the sensing, causing a slew rate different from the desired one. Indeed, it is often not possible to use a reference current of high value (so as to make negligible the effect of the leakage current), since this might involve a too-high voltage slope that is very difficult to measure.